Senior Design Verification Engineer

L&T Technology Services

The Role

Overview

Develop UVM verification environments for SoC/video/AI/ML designs and ensure low-power compliance.

Requirements

  • uvm
  • low power
  • gls simulation
  • git
  • svn
  • debugging

What You Bring

Low Power and GLS Simulations will be plus SoC/SS Lead Engineers : Experience in development of UVM based verification environments from scratch. Experience with Design verification of ta-center applications like Video, AI/ML and Networking designs. Experience in Mercurial (Hg), Git or SVN. Experience with low power design. Experience working across and building relationships with cross-functional design, model, and emulation teams.Strong in Funmentals, Digitial Concepts, Debugging

The Company

About L&T Technology Services

-a leading provider of engineering and R&D services. -a focus on digital transformation and innovation in industries like aerospace, automotive, healthcare, and more. -cutting-edge solutions in IoT, AI, machine learning, and automation for smarter operations. -designing future-ready vehicles, enhancing medical technology, and optimizing industrial processes. -known for expertise in next-gen technologies and sustainable solutions for sectors like energy, transportation, and manufacturing. -an integral player in the global R&D ecosystem, partnering with top-tier firms for digitalization. -continuous investment in advanced technologies for engineering innovation and service delivery.

Sector Specialisms

MedTech

Process Industry

Industrial Products

Semiconductors

Media & Entertainment

Oil & Gas

Public Infrastructure & Smart Cities

Automotive

Commercial Vehicles

Aerospace

Industrial Machinery

Building Technology

Electric & Power

FMCG

Telecom & Hi-Tech

Computing & ISV

Consumer Electronics

Hyperscalers

NexGen Communications