Work with partitions/block owner to give timing ECO for timing closure.
Can work closely with FE team for constraints development and constraints cleanup.
Knowledge of advanced timing closure techniques and methodology
Minimum 4+ of relevant experience
L&T Technology is hiring for STA Engineers / Physical Design Engineers with 4-8 years of experience.
Good scripting and communication skills
Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs.
Worked on DSM technologies, tsmc 5nm and below experience preferred.
Knowledge of industry stanrd tools from Synops or Cadence.
Benefits