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FPGA Design Engineer

Employer undisclosedRole managed by a recruiter
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Design, develop, and verify FPGA architectures using VHDL/SystemVerilog.
2 days ago ago
£90
Expert & Leadership (13+ years), Intermediate (4-7 years), Experienced (8-12 years)
Contractor
Stevenage, England, United Kingdom
Onsite

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Role

Description

fpga design
verification tools
team collaboration
c programming
simulink
design documentation

Requirements

fpga
vhdl
systemverilog
matlab
degree
security clearance

Benefits

Training + Development

Information not given or found

Interview process

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Visa Sponsorship

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Security clearance

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