Physical Design Lead

Description

• Work on RTL2GDS flow and design tapeouts in 3nm or smaller process tech.

Requirements

Hybrid is considered

• Experience with low-power design techniques
• Experience with advanced process nodes (7nm or below)
• You must be able to commute to and from the location with your own transportation arrangements to meet the required working hours.
• Proficiency in STA, clock tree synthesis and IR drop analysis
• Work with advanced process nodes (7nm or below)
• Experience with PTPX power flow.
• Worked with Synopsys EDA tools like Fusion Compiler and Primetime. Additional skills the Whole Team Needs (as a collective)
• Work STA, clock tree synthesis and IR drop analysis
• 10+ years of experience in physical design.
• Experience with custom or regular clock tree synthesis (block or top level) and techniques to reduce clock power. Experience with low-power implementation, power gating, multiple voltage rails, and UPF knowledge.

Benefits

We offer flexible work options, including hybrid arrangements, to support the need of the role and align with company policies. This position is located in Sunnyvale California is considered hybrid with 3 days required on-site.

Training + Development

Interview process

Visa Sponsorship

Security clearance